1. Field of the Invention
The present invention relates to circuits for detecting and correcting digital data signal errors, and in particular, to distributive encoders for encoding error signals which represent signal peak errors in data signals for purposes of identifying erroneous signal baseline, peak and equalization conditions.
2. Description of the Related Art
Recovery data from data signals which have been transmitted over long lengths of cable at high data rates requires that such data signals be equalized in order to compensate for the signal loss and phase dispersion characteristics of the cable. Further, in those applications where the cable length may vary, such equalization must be capable of adapting according to the length of the cable.
Conventional adaptive equalization is typically accomplished through the use of a feedback control signal having an amplitude which is proportional to the pulse height of the equalized data signal. However, such a technique for controlling the adaptive equalization process is very sensitive to amplitude errors on the incoming data signal.
Accordingly, it would be desirable to have a control circuit which generates suitable error correction control signals capable of controlling the adaptive equalization process, including correction for signal baseline wander, as well as controlling subsequent amplitude splicing of the equalized data signal.